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lt 3932/lt 3932-1 1 3932fa for more information www.linear.com/lt3932 typical application features description 36v, 2a synchronous step-down led driver the lt ? 3932 is a monolithic, synchronous, step-down dc/ dc converter that utilizes fixed-frequency, peak current control and provides pwm dimming for a string of leds . the led current is programmed by an analog voltage or the duty cycle of pulses at the ctrl pin. an output volt - age limit can be set with a resistor divider to the fb pin. the switching frequency is programmable from 200khz to 2 mhz by an external resistor at the rt pin or by an external clock at the sync/sprd pin. with the optional spread spectrum frequency modulation enabled, the frequency varies from 100% to 125% to reduce emi. the lt3932 also includes a driver for an external, high side pmos for pwm dimming and an internal pwm signal generator for analog control of pwm dimming when an external signal is not available . the lt3932 -1 permits higher dimming ratios . additional features include an led current monitor, an accurate en/uvlo pin threshold, open-drain fault report - ing for open-circuit and short-circuit load conditions , and thermal shutdown. 2a led driver with internal pwm dimming internal pwm dimming applications n 1.5% led current regulation n 1.2% output voltage regulation n 5000:1/10000+:1 pwm dimming at 100hz (lt3932/LT3932-1) n 128:1 internal pwm dimming n spread-spectrum frequency modulation n silent switcher ? architecture for low emi n 3.6v to 36v input voltage range n 0v to 36v led string voltage n 200khz to 2mhz with sync function n 99.9% maximum duty cycle n analog or duty cycle led current control n open/short led protection and fault indication n accurate led current sense with monitor output n programmable uvlo n thermally enhanced 28-pin (4mm 5mm) qfn n automotive lighting n industrial and general purpose lighting n machine vision systems all registered trademarks and trademarks are the property of their respective owners. protected by u.s. patents including 7199560, 7321203, 9596728, 9642200 and other patents pending. 30.1k 274k 45.3k 110k 10k 50m 22nf intv cc 2.2f 2.2f 100nf 10nf 3932 ta01a 2x1f 8.2h 28.7k 162k 100k 100k 100k 10f c out 100f v in en/uvlo v ref ctrl pwm sync/sprd intv cc ss rt rp v c isp isn fb v out sw bst lt3932 pwmtg v in 12v v out 9v 1a 2mhz ismon fault fault ismon 7.8khz gnd pwm = 1.078v (8% pwm duty ratio) 2s/div sw 20v/div pwmtg 10v/div il 1a/div iled 1a/div 3932 ta01b
lt 3932/lt 3932-1 2 3932fa for more information www.linear.com/lt3932 pin configuration absolute maximum ratings v in , en / uvlo ............................................................ 40 v isp , isn , and v out .................................................... 40 v isp ? isn ................................................................. 0.3 v ctrl and fb ............................................................ 3.3 v pwm , sync / sprd , and fa u lt ...................................6v ss and v c ................................................................ 3.3 v sw, bst , intv cc , v ref , ismon , pwmtg , rt, and rp ............................................................... ( note 2) operating junction temperature range ( notes 3, 4) lt 3932 e/ lt 3932 i .............................. ?40 c to 125 c lt 3932 h ............................................ ?40 c to 150 c storage temperature range .................. ?65 c to 150 c (note 1) 9 10 top view ufd package 28-lead (4mm 5mm) plastic qfn 11 12 13 28 27 26 25 24 14 23 6 5 4 3 2 1 v ref ss v c fb isp isn ismon fault gnd v in v in sw sw v in v in gnd ctrl en/uvlo v in intv cc bst gnd rp rt sync/sprd pwm pwmtg v out 7 17 18 19 20 21 22 16 8 15 29 gnd ja = 25c/w (measured on dc2286a) exposed pad (pin 29) is gnd, must be soldered to pcb order information electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, v en/uvlo = 5v unless otherwise noted. lead free finish tape and reel part marking* package description temperature range lt3932eufd#pbf lt3932eufd#trpbf 3932 28-lead (4mm 5mm) plastic qfn ?40c to 125c lt3932iufd#pbf lt3932iufd#trpbf 3932 28-lead (4mm 5mm) plastic qfn ?40c to 125c lt3932hufd#pbf lt3932hufd#trpbf 3932 28-lead (4mm 5mm) plastic qfn ?40c to 150c lt3932eufd-1#pbf lt3932eufd-1#trpbf 39321 28-lead (4mm 5mm) plastic qfn ?40c to 125c lt3932iufd-1#pbf lt3932iufd-1#trpbf 39321 28-lead (4mm 5mm) plastic qfn ?40c to 125c lt3932hufd-1#pbf lt3932hufd-1#trpbf 39321 28-lead (4mm 5mm) plastic qfn ?40c to 150c consult adi marketing for parts specified with wider operating temperature ranges . * the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. parameter conditions min typ max units input voltage range 3.6 36 v v in pin quiescent current en/uvlo = 2v, not switching en/uvlo = 300mv, shutdown l 2.2 2.7 2 ma a en/uvlo threshold (falling) 1.09 1.15 1.21 v en/uvlo rising hysteresis 20 mv en/uvlo pin hysteresis current 4 a http://www .linear.com/product/lt3932#orderinfo
lt 3932/lt 3932-1 3 3932fa for more information www.linear.com/lt3932 electrical characteristics parameter conditions min typ max units reference v ref voltage i vref = 0a i vref = 500a l 1.975 1.980 2 1.998 2.020 2.016 v v v ref pin current limit v ref = 1.9v, current out of pin 2 ma led current regulation ctrl-off threshold (falling) l 200 218 228 mv ctrl-off rising hysteresis 20 mv ctrl pin current v ctrl = 2v ?100 100 na sense voltage (v isp ?v isn ) (analog input) v ctrl = 1.5v (100%), v in = 36v, v isp = 24v v ctrl = 750mv (50%), v in = 36v, v isp = 24v v ctrl = 300mv (5%), v in = 36v, v isp = 24v l l l 98.5 48.5 4 100 50 5 101.5 51.5 6 mv mv mv isp pin current v in = 36v, v isp = 24v, v ctrl = 2v, current into pin 50 a isn pin current v in = 36v, v isn = 23.9v, v ctrl = 2v, current into pin 50 a isp/isn common mode range v in = 36v (note 5) 0 36 v current error amplifier transconductance v in = 36v, v isp = 24v 200 a/v duty cycle control of led current sense voltage (v isp ?v isn ) (duty cycle input) ctrl duty = 75% (100%), v in = 36v, v isp = 24v ctrl duty = 37.5% (50%), v in = 36v, v isp = 24v ctrl duty = 15% (5%), v in = 36v, v isp = 24v 99 49 4 100 50 5 101 51 6 mv mv mv ctrl pulse input high (v ih ) 1.6 v ctrl pulse input low (v il ) 0.4 v ctrl pulse input frequency range 100 1000 khz voltage regulation fb regulation voltage v isp = v isn = 6v, v ctrl = 2v l 0.988 1.000 1.012 v fb pin current v fb = 1v ?100 100 na voltage error amplifier transconductance 480 a/v power stage peak current limit 3.0 3.6 4.2 a minimum off-time (note 6) 55 ns minimum on-time (note 6) 55 ns bottom switch on-resistance 90 m top switch on-resistance 90 m oscillator programmed switching frequency (f sw ) r t = 45.3k, v sync/sprd = 0v r t = 523k, v sync/sprd = 0v l l 1900 180 2000 200 2100 230 khz khz spread spectrum frequency range r t = 45.3k, v sync/sprd = 3.3v r t = 523k, v sync/sprd = 3.3v 1900 180 2650 290 khz khz rt pin current limit v rt = 0v, current out of pin 34 a sync/sprd threshold (rising) 1.4 1.5 v sync/sprd falling hysteresis 220 mv sync/sprd pin current v sync/sprd = 3.3v ?100 100 na soft-start ss pin charging current v ss = 0v 20 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, v en/uvlo = 5v unless otherwise noted.
lt 3932/lt 3932-1 4 3932fa for more information www.linear.com/lt3932 note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: do not apply a positive or negative voltage source to these pins, otherwise permanent damage may occur. note 3: the lt3932e is guaranteed to meet performance specifications from 0c to 125c junction temperature. specifications over the ?40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3932i is guaranteed to meet performance specifications over the ?40c to 125c operating junction temperature range. the lt3932h is guaranteed over the ?40c to 150c operating junction temperature range. operating lifetime is derated for junction temperatures greater than 125c. note 4: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. the maximum rated junction temperature will be exceeded when this protection is active. continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. note 5: the current sense error amplifier is tested with v isp = 36v, and separately, with v isn = 0v. note 6: the min on and off times are guaranteed by design and are not tested. electrical characteristics parameter conditions min typ max units ss pin discharging current v ss = 2v 1.25 a ss lower threshold (falling) 200 mv ss higher threshold (rising) 1.7 v fault detection open-circuit threshold (fb rising) l 930 950 970 mv open-circuit falling hysteresis 55 mv short-circuit threshold (fb falling) l 180 200 220 mv short-circuit rising hysteresis 50 mv fault pull-down current v fault = 200mv, v fb = 0v 100 a fault leakage current v fault = 3.3v, v fb = 700mv ?100 100 na overvoltage protection fb overvoltage threshold (fb rising) 1.050 v fb overvoltage falling hysteresis 48 mv led current monitor ismon voltage v isp ? v isn = 100mv (100%), v isp = 12v v isp ? v isn = 10mv (10%), v isp = 12v 0.965 80 1.000 100 1.030 120 v mv pwm driver pwmtg gate drive (v out ? v pwmtg ) v out = 12v, v pwm = 2v l 10 11 v pwm threshold (rising) v out = 12v 1.4 v pwm falling hysteresis v out = 12v 200 mv pwm pin current v pwm = 2v ?100 100 na pwm to pwmtg propagation delay turn-on turn-off c pwmtg = 2.2nf (connected from v out to pwmtg), v out = 12v 100 100 ns ns analog control for pwm dimming pwm voltage for 100% dimming r p = 28.7k, v ref = 2v 2.00 v pwm voltage for 0% dimming r p = 28.7k, v ref = 2v 0.99 v pwm dimming accuracy r p = 28.7k, v ref = 2v, v pwm = 1.1v r p = 28.7k, v ref = 2v, v pwm = 1.9v l l 7.8 87 10 90 12.4 93 % % pwm dimming frequency r p = 28.7k, r t = 45.3k, v sync/sprd = 0v r p = 332k, r t = 45.3k, v sync/sprd = 0v 7.42 116 7.81 122 8.20 128 khz hz rp pin current limit r p = 0v, current out of pin 60 a the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 12v, v en/uvlo = 5v unless otherwise noted.
lt 3932/lt 3932-1 5 3932fa for more information www.linear.com/lt3932 typical performance characteristics v in shutdown current v in quiescent current intv cc voltage intv cc load regulation v ref voltage v ref load regulation en/uvlo threshold en/uvlo pin current v in uvlo threshold v in = 12v, unless otherwise noted. temperature (c) ?50 ?25 0 25 50 75 100 125 150 1.1 1.2 1.3 1.4 1.5 1.6 en/uvlo voltage (v) 3932 g01 temperature (c) ?50 ?25 0 25 50 75 100 125 150 3.7 4.0 4.3 4.6 4.9 5.2 5.5 5.8 6.1 en/uvlo current (a) 3932 g02 temperature (c) ?50 ?25 0 25 50 75 100 125 150 2.4 2.6 2.8 3.0 3.2 3.4 3.6 v in voltage (v) 3932 g03 v en/uvlo = 0.3v temperature (c) ?50 ?25 0 25 50 75 100 125 150 0.01 0.1 1 10 100 1k 10k v in current (na) 3932 g04 v en/uvlo = 1v temperature (c) ?50 ?25 0 25 50 75 100 125 150 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v in current (ma) 3932 g05 temperature (c) ?50 ?25 0 25 50 75 100 125 150 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 intv cc voltage (v) 3932 g06 intv cc current (ma) 0 3 6 9 12 15 3.28 3.30 3.32 3.34 3.36 3.38 3.40 intv cc voltage (v) 3932 g07 temperature (c) ?50 ?25 0 25 50 75 100 125 150 1.97 1.98 1.99 2.00 2.01 2.02 2.03 v ref voltage (v) 3932 g08 v ref current (ma) 0 0.4 0.8 1.2 1.6 2 1.97 1.98 1.99 2.00 2.01 2.02 2.03 v ref voltage (v) 3932 g09
lt 3932/lt 3932-1 6 3932fa for more information www.linear.com/lt3932 typical performance characteristics rp and rt pin current limit ss pin pull-up current ss thresholds sw frequency internal pwm frequency pwm duty ratio v ref line regulation intv cc and v ref uvlo threshold minimum on-time and off-time v in voltage (v) 0 6 12 18 24 30 36 1.97 1.98 1.99 2.00 2.01 2.02 2.03 v ref voltage (v) 3932 g10 25c 150c ?50c intv cc v ref temperature (c) ?50 ?25 0 25 50 75 100 125 150 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 voltage (v) 3932 g11 minimum off?time minimum on?time temperature (c) ?50 ?25 0 25 50 75 100 125 150 25 35 45 55 65 75 time (ns) 3932 g12 r p current r t current temperature (c) ?50 ?25 0 25 50 75 100 125 150 20 30 40 50 60 70 current (a) 3932 g13 temperature (c) ?50 ?25 0 25 50 75 100 125 150 16 17 18 19 20 21 22 23 24 ss current (a) 3932 g14 lower rising lower falling upper rising upper falling temperature (c) ?50 ?25 0 25 50 75 100 125 150 0 0.4 0.8 1.2 1.6 2.0 ss voltage (v) 3932 g15 r t = 45.3k r t = 523k temperature (c) ?50 ?25 0 25 50 75 100 125 150 1400 1600 1800 2000 2200 180 200 220 240 260 sw frequency (khz) 3932 g16 internal pwm r t = 45.3k external pwm r p resistance () 10k 100k 1m 0.1 1 10 pwm frequency (khz) 3932 g17 pwm voltage (v) 0 0.5 1 1.5 2 2.5 3 ?10 0 10 20 30 40 50 60 70 80 90 100 110 duy ratio (%) 3932 g18 v in = 12v, unless otherwise noted.
lt 3932/lt 3932-1 7 3932fa for more information www.linear.com/lt3932 typical performance characteristics led current (100% regulation) led current (5% regulation) ismon voltage peak sw current limit led current line regulation led current vs v out led current (analog ctrl) led current (digital ctrl) led voltage limit ctrl voltage (v) 0 0.25 0.50 0.75 1 1.25 1.50 1.75 2 ?10 0 10 20 30 40 50 60 70 80 90 100 110 v isp - v isn (mv) 3932 g19 ctrl duty ratio (%) 0 12.5 25 37.5 50 62.5 75 87.5 100 ?10 0 10 20 30 40 50 60 70 80 90 100 110 v isp - v isn (mv) 3932 g20 v ctrl = 2v fb voltage (v) 0.97 0.98 0.99 1 1.01 1.02 0 25 50 75 100 125 v isp ? v isn (mv) 3932 g21 v ctrl = 1.5v 300 units 155c 25c ?50c v isp - v isn (mv) 98.8 99.2 99.6 100.0 100.4 100.8 101.2 0 30 60 90 120 150 180 210 240 270 300 number of units 3932 g22 v ctrl = 300mv 300 units 155c 25c ?50c v isp - v isn (mv) 4.8 4.9 5 5.1 5.2 5.3 5.4 0 30 60 90 120 150 180 210 240 270 300 number of units 3932 g23 v isp ? v isn (mv) 0 50 100 150 200 250 300 0 0.5 1.0 1.5 2.0 ismon voltage (v) 3932 g24 duty ratio (%) 10 30 50 70 90 2.0 2.4 2.8 3.2 3.6 4.0 peak sw current (a) 3932 g25 2 leds (approx. 6v) 2mhz sw frequency v in voltage (v) 0 6 12 18 24 30 36 48.0 48.4 48.8 49.2 49.6 50.0 v isp - v isn (mv) 3932 g26 v ctrl = 735mv 2mhz sw frequency v ctrl = 750mv v in = 36v v out voltage (v) 0 6 12 18 24 30 36 49.0 49.4 49.8 50.2 50.6 51.0 v isp - v isn (mv) 3932 g27 v in = 12v, unless otherwise noted.
lt 3932/lt 3932-1 8 3932fa for more information www.linear.com/lt3932 typical performance characteristics efficiency vs v in efficiency vs i led regulated fb voltage pwmtg voltage pwm driver propagation delay fb ovlo threshold fb openled threshold fb shortled threshold power switch on-resistance v in = 12v, unless otherwise noted. rising falling temperature (c) ?50 ?25 0 25 50 75 100 125 150 0.80 0.85 0.90 0.95 1.00 1.05 1.10 fb voltage (v) 3932 g28 rising falling temperature (c) ?50 ?25 0 25 50 75 100 125 150 0.10 0.15 0.20 0.25 0.30 0.35 0.40 fb voltage (v) 3932 g29 top switch bottom switch temperature (c) ?50 ?25 0 25 50 75 100 125 150 0 50 100 150 200 250 300 resistance (mohm) 3932 g30 2 leds (approx. 6v, 1a) 400khz 2mhz v in voltage (v) 5 10 15 20 25 30 35 40 80 85 90 95 100 efficiency (%) 3932 g31 v in = 24v 2mhz sw frequency 5 leds (approx. 15v) 4 leds (approx. 12v) i led (ma) 0 400 800 1200 1600 2000 80 85 90 95 100 efficiency (%) 3932 g32 v ctrl = 2v v isp ? v isn = 0v temperature (c) ?50 ?25 0 25 50 75 100 125 150 0.97 0.98 0.99 1.00 1.01 1.02 fb voltage (v) 3932 g33 v out = 20v v pwm = 2v temperature (c) ?50 ?25 0 25 50 75 100 125 150 7 8 9 10 11 12 v out ? v pwmtg (v) 3932 g34 c pwmtg = 2.2nf (x7r) data includes capacitance variation with temperature turn?on turn?off temperature (c) ?50 ?25 0 25 50 75 100 125 150 50 75 100 125 150 175 200 225 250 propagation delay (ns) 3932 g35 rising falling temperature (c) ?50 ?25 0 25 50 75 100 125 150 0.900 0.950 1.000 1.050 1.100 fb voltage (v) 3932 g36
lt 3932/lt 3932-1 9 3932fa for more information www.linear.com/lt3932 typical performance characteristics internal pwm duty ratio (90%) input voltage transient response input voltage transient response turn-on and turn-off start-up with 10% internal pwm start-up with 90% internal pwm c/10 threshold da current limit internal pwm duty ratio (10%) v in = 12v, unless otherwise noted. rising falling temperature (c) ?50 ?25 0 25 50 75 100 125 150 6 8 10 12 14 16 18 v isp - v isn (mv) 3932 g37 temperature (c) ?50 ?25 0 25 50 75 100 125 150 2.0 2.1 2.2 2.3 2.4 2.5 sw current (a) 3932 g38 v pwm = 1.1v 250 units 150c 25c ?50c pwm duty ratio (%) 8.6 9 9.4 9.8 10.2 10.6 11.0 11.4 11.8 0 40 80 120 160 200 number of units 3932 g39 v pwm = 1.9v 250 units 150c 25c ?50c pwm duty ratio (%) 88.6 89 89.4 89.8 90.2 90.6 91.0 91.4 91.8 0 40 80 120 160 200 number of units 3932 g40 front page application 15v to 25v input voltage step 3 leds (approx. 9v) 1ms/div v in 10v/div i led 100ma/div 3932 g41 front page application 25v to 15v input voltage step 3 leds (approx. 9v) 1ms/div v in 10v/div i led 100ma/div 3932 g42 front page application 3 leds (approx. 9v) 5ms/div v in 20v/div v out 5v/div i led 500ma/div 3932 g43 front page application with pwm = 1.1v 3 leds (approx. 9v) 5ms/div v in 20v/div v out 5v/div i led 500ma/div 3932 g44 front page application with pwm = 1.9v 3 leds (approx. 9v) 5ms/div v in 20v/div v out 5v/div i led 500ma/div 3932 g45
lt 3932/lt 3932-1 10 3932fa for more information www.linear.com/lt3932 pin functions v in : input voltage pins. these pins supply power to the internal, high performance analog circuitry, and they sup - ply the inductor current when the internal high side power switch is on. connect capacitors between these pins and gnd and see selecting and placing the input capacitors in applications information for advice regarding their placement. en/ uvlo: enable and undervoltage lockout pin . a voltage at this pin greater than 1.15v will enable switching, and a voltage less than 300mv is guaranteed to shut down the internal current bias and sub-regulators. a resistor network between this pin and gnd can be used to set the pin voltage and automatically lockout the part when v in is below a certain level. no internal components pull up or down on this pin, so it requires an external voltage bias for normal operation. this pin may be tied directly to v in . intv cc : internally regulated, low-voltage supply pin. this pin provides the power for the converter switch gate drivers. do not force any voltage on this pin, but bypass it with a 2.2f capacitor to gnd. isp: positive current sense pin. this pin is one of the inputs to the internal current sense error amplifier. it should be connected to the positive side of the external sense resistor. isn: negative current sense pin. this pin is one of the inputs to the internal current sense error amplifier. it should be connected to the negative side of the external sense resistor. ismon: output current monitoring pin. this pin provides a buffered voltage output equal to 10 mv for every 1mv between isp and isn. ctrl: control pin. an analog voltage from 250 mv to 1.25v at this pin programs the regulated voltage between isp and isn (and therefore, the regulated current supplied to the load). alternatively, a digital pulse at this pin with duty cycle from 12.5% to 62.5% can be used to program the regulated voltage. below 200mv or 10% duty cycle, the ctrl pin voltage disables switching. for more detail, see regulated led current in typical performance curves and programming led current with the ctrl pin in ap - plications information. v ref : reference voltage pin. this pin provides a buffered 2v reference capable of 2ma drive. it can be used to sup - ply resistor networks for setting the voltages at the ctrl and pwm pins. bypass with a 2.2f capacitor to gnd. fb: feedback pin. when the voltage at this pin is near 1v, the regulated current is automatically reduced from the programmed value. a resistor network between this pin and v out can be used to set a limit for the output voltage. if the voltage at the fb pin reaches 1.05v, an overvoltage lockout comparator disables switching. fault : fault pin. connect to intv cc through a resistance of 100k. when the fb pin voltage is less than 200mv, an internal switch pulls this pin low to indicate a short-circuit . when fb is greater than 950mv and the voltage between isp and isn is simultaneously less than 10mv, the switch pulls this pin low to indicate an open-circuit. ss: soft-start pin. at startup and recovery from fault conditions, a 20a current charges the capacitor and the fb voltage tracks the rising voltage at this pin until the load current reaches its programmed level. typical values for the capacitor are 10nf to 100nf. a resistor from ss to intv cc is used to select one of several fault modes. see soft-start and fault modes in applications information for more details. v c : compensation pin. a capacitor connected from this pin to gnd stabilizes the current and voltage regulation . see stabilizing the regulation loop in the applications information section for more details. sw: switch pins. these two pins are internally connected to the power devices and drivers. they should always be tied together. in normal operation, the voltage of these pins will switch between the input voltage and zero at the programmed frequency. do not force any voltage on these pins. rt : timing resistor pin. a resistor from this pin to gnd programs the switching frequency between 200khz and 2mhz. do not leave this pin open.
lt 3932/lt 3932-1 11 3932fa for more information www.linear.com/lt3932 pin functions sync/sprd: synchronization pin. to override the pro - grammed switching frequency, drive this pin with an external clock having a frequency between 200khz and 2mhz. even when using the external clock, select an r t resistor that corresponds to the desired switching fre - quency. tie the pin to intv cc to enable spread spectrum frequency modulation. this pin should be tied to gnd when not in use. bst: boost pin. this pin supplies the high side power switch driver. connect a 22nf capacitor between this pin and sw, and connect a diode from intv cc to bst to charge the capacitor when the sw pin is low. pwm : pwm input pin. with the rp pin tied to gnd, drive this pin with a digital pulse to control pwm dimming of the leds. alternatively, set the voltage of this pin between 1v and 2v to generate an internal pulse with duty ratio between 0% and 100%. in this case, place a 1f bypass capacitor between this pin and gnd. tie this pin high when pwm dimming is not required. pwmtg: pwm driver output pin . this pin can drive the gate of an external, high side pmos device for pwm dimming of leds. do not force any voltage on this pin. rp: pwm resistor pin. connect a resistor from this pin to gnd to set the frequency of the internal pwm signal . do not use a resistor larger than 1m. if using an external pwm pulse for led dimming, tie this pin to gnd. v out : pwm driver supply pin . this pin supplies an internal regulator for the driver of the external pmos device. tie this pin to the output voltage even if dimming is not required. gnd: ground pins. these must be soldered to the ground plane of the circuit board.
lt 3932/lt 3932-1 12 3932fa for more information www.linear.com/lt3932 block diagram 25 16 24 17 20 21 + ? + internal v cc regulator and uvlo 2v reference synchronous controller s r q 27 26 1 en/uvlo v in c in c vcc r en1 r t r en2 c ref intv cc bst d1 bottom switch driver top switch driver 50m 4.7f 8.2h v in v in sw da current limit v ref 11 sync/sprd 28 ctrl ? + + 200khz to 2mhz oscillator 18 19 v out 22nf c in 14 isn 3923 bd 6 isp 5 fb 4 ? + ? + ? + ? + 10 rt 2 ss gnd 3 v c c ss c c r ss 9 rp 200mv 950mv 1.4v 1.0v 20a 1.25a 3k 3k v out ? 10v regulator internal pwm signal fault logic fault comparators fault logic current regulation amplifier g m = 200s voltage regulation amplifier g m = 480s peak current comparator 1.25v 250mv pwmtg driver pwm 12 pwmtg 13 ismon 10x 7 fault intv cc r fb1 r fault r fb2 8 ? + + control buffer 30k a/d detector 22 23 29 intv cc + ? + ? s/h s/h ? + 15
lt 3932/lt 3932-1 13 3932fa for more information www.linear.com/lt3932 operation the lt3932 is a step-down led driver that utilizes fixed- frequency, peak-current control to accurately regulate the current through a string of leds. it includes two power switches and their drivers. the switches connect an external inductor at the sw pin alternately to the input supply and then to ground. the inductor current rises and falls accordingly and the peak current can be regulated by adjusting the duty ratio of the power switches through the combined effect of the other circuit blocks. the synchronous controller ensures the power switches do not conduct at the same time, and a programmable oscillator turns on the top switch at the beginning of each switching cycle. the frequency of this oscillator is set by an external resistor at the rt pin and can be overridden by external pulses at the sync/sprd pin. the sync/ sprd pin can also be used to command spread spectrum frequency modulation ( ssfm), which reduces radiated and conducted electromagnetic interference (emi). the top switch is turned off by the peak current comparator which waits during the on-time for the increasing inductor current to exceed the target set by the voltage at the v c pin. this target is modified by a signal from the oscillator which stabilizes the inductor current. a capacitor at the v c pin is necessary to stabilize this regulation loop. the target for the inductor current is derived from the desired led current programmed by the voltage at the ctrl pin. the analog-to-digital detector and the control buffer convert either a dc voltage or digital pulses at the ctrl pin into the input for the current regulation ampli - fier. the other input to this amplifier comes from the isp and isn pin voltages. an external current sense resistor between these pins should be placed in series with the string of leds such that the voltage across it provides the feedback to regulate the led current. the current regula - tion amplifier then compares the actual led current to the programmed led current and adjusts v c as necessary. the voltage regulation amplifier overrides the current regulation amplifier, when the fb pin voltage approaches an internal 1v reference. an external resistor network from the led string to the fb pin provides an indication of the led string voltage and allows the voltage amplifier to prevent overvoltage of the led string. the fb voltage is also monitored to detect fault conditions like open and short-circuits , which are then reported by pulling the fault pin low. the response to a fault can be selected either to try hiccup restarts or to latch-off by the choice of an external resistor connected to the ss pin. refer to applications information for a detailed explana - tion of fault responses. finally, pulse-width-modulation ( pwm ) of the led cur - rent is achieved by turning on and off an external pmos switch between the inductor and the string of leds. an external pulse at the pwm pin controls the state of the pwm driver , or a dc voltage at the pwm pin dictates the duty ratio of an internal pwm pulse , whose frequency is programmed by an external resistor at the rp pin. after each pulse, when the pmos switch is open, the lt3932 preserves the voltages of the capacitors at v c and v out to ensure a rapid recovery for the next pulse.
lt 3932/lt 3932-1 14 3932fa for more information www.linear.com/lt3932 applications information below 250mv, the ctrl pin commands zero led current, and above 1.25v, it commands the maximum. when an independent voltage source is not available , the intermedi - ate ctrl voltages may be derived from the 2v reference at the v ref pin using a resistor network or potentiometer as long as the total current drawn from the v ref pin is less than 1ma. additionally, the lt3932 is capable of interpreting a pulse at the ctrl pin. the high level of the pulse must be greater than 1.6v. the low level must be less than 400mv. the frequency must be greater than 100khz and less than 1 mhz. then the regulated voltage between isp and isn will vary with the duty ratio of the pulse as shown in figure 2. in this case, the led current is zero for duty ratios less than 12.5% and reaches its maximum above 62.5%. the lt3932 will cease switching if the duty ratio of the ctrl pin pulse is less than 10%, and also for dc ctrl pin voltages less than 200mv. figure 1. analog ctrl range figure 2. duty ratio ctrl range figure 3. setting ctrl with ntc resistors the following is a guide to selecting the external com - ponents and configuring the lt3932 according to the requirements of an application. programming led current with the ctrl pin the primary function of the lt3932 is to regulate the current for a string of leds. this current should pass through a series current sense resistor that can be placed anywhere in the string. then the voltage across this resistor will be sensed by the current regulation amplifier through the isp and isn pins and regulated to a level programmed by the ctrl pin. the maximum resistor voltage that can be programmed is 100mv, which corresponds to 2 a through the led string when a 50 m current sense resistor is used. to allow for this maximum current , the ctrl pin may be connected directly to the v ref pin, which provides an accurate 2v reference. lower current levels can be programmed by dc ctrl voltages between 250 mv and 1.25v as shown in figure 1. 0 0.25v 0.75v i led v ctrl 1.25v 1.5v 3932 f01 v ctrl < 200mv ctrl?off 100mv r sns 50mv r sns lt3932 ctrl v ref r ctrl1 r ctrl2 r ntc lt3932 3932 f03 ctrl v ref r ctrl1 r ctrl2 r ntc 0 12.5% 37.5% 62.5% 75% 3932 f02 d ctrl < 10% ctrl?off 100mv r sns 50mv r sns i led d ctrl to reduce the led current when the temperature of the leds rises, use resistors with negative temperature coef- ficient (ntc) in the network from v ref to ctrl as shown in figure 3.
lt 3932/lt 3932-1 15 3932fa for more information www.linear.com/lt3932 figure 4. typical average conducted emissions applications information setting switching frequency with the rt pin the switching frequency of the lt3932 is programmed by a resistor connected between the rt pin and gnd . values of the r t resistor from 45.3k up to 523k program frequencies from 2 mhz down to 200 khz as shown in table 1. higher frequencies allow for smaller external components but increase switching power losses and radiated emi. table 1. r t resistance range switching frequency r t 2.0mhz 45.3k 1.6mhz 59.0k 1.2mhz 80.6k 1.0mhz 97.6k 750khz 133k 500khz 205k 400khz 255k 300khz 348k 200khz 523k synchronizing switching frequency the switching frequency can also be synchronized to an external clock connected to the sync/sprd pin. the high level of the external clock must be at least 1.4v, and the frequency must be between 200khz and 2mhz. the r t resistor is still required in this case, and the resistance should correspond to the frequency of the external clock. if the external clock ever stops, the lt3932 will rely on the r t resistor to set the frequency. enabling spread spectrum frequency modulation connecting sync/ sprd to intv cc will enable spread spectrum frequency modulation (ssfm). the switching frequency will vary from the frequency set by the r t resistor to 125% of that frequency. if neither synchronization nor ssfm is required, connect sync/sprd to gnd. as shown in figure 4, enabling ssfm can significantly at - tenuate the electromagnetic interference that the lt3932, like all switching regulators, emits at the switching fre - quency and its harmonics. this feature is designed to help devices that include the lt3932 perform better in the various standard industrial tests related to interference. the attenuation varies depending on the chosen switching frequency, the range of frequencies in which interference is measured, and whether a test measures peak, quasi- peak, or average emissions. the results of several other such emission measurements are with select typical applications. understanding the current limit the choice of switching frequency should be made know - ing that, although the maximum led current that can be programmed with the ctrl pin is 2a, the inductor current may exceed 2a when the frequency is high and the output voltage is low as in a short-circuit . this is because there is a minimum on-time for which the sw pin will be driven high during each switching period. the inductor current increases during this time, and if the frequency is high and the output voltage low, there may not be enough off-time remaining in each switching period for the inductor current to decrease back to the level at which it started. in this case, the net inductor current would increase with each switching period regardless of the state of the ctrl pin. to prevent large inductor currents that would damage the lt3932, the high-side switch is not turned on until the inductor current decreases to less than the da current limit, which is approximately 2.3a. while the high-side switch is off, the current is sensed through the low-side switch. the peak inductor current may increase to 3.6a, but the off-time and the switching period are extended until the inductor current reaches equilibrium as shown in figure 5. with ssfm without ssfm frequency (mhz) 1 3 5 7 9 11 ?40 ?20 0 20 40 60 80 100 amplitude (dbuv) 3932 f04
lt 3932/lt 3932-1 16 3932fa for more information www.linear.com/lt3932 applications information the da current limit is relevant only when the output capacitor is shorted to gnd. when instead the led string is shorted to gnd, the voltage across the external pmos (described later) is high enough that the required on-time is greater than the minimum on-time. this means that, in spite of a shorted led string, the inductor current remains in regulation even at the highest switching frequency. selecting an inductor the inductor must be rated for the current limit regardless of the intended application . its value, in most applications, should be selected such that the inductor current ripple is not more than 25% of the maximum output current. when that current is 2a, for example, the minimum inductance can be calculated using the following equation: l = 2h ? v out v in(max) ? v in(max) ? v out 1v ? 1mhz f sw however, for high output voltages even the above equation would suggest an inductance value that is too small. for stability, the lt3932 requires an inductance greater than: l = 1h ? v out 1v ? 1mhz f sw choose the larger of the values given by these equations. the manufacturers featured in table 2 are recommended sources of inductors. table 2. inductor manufacturers manufacturer website wrth elektronik www.we-online.com coilcraft www.coilcraft.com selecting an output capacitor some applications are sensitive to ripple current in the led string. in those cases, a capacitor at the output will absorb part of the inductor current ripple and thereby reduce the led current ripple. typically, the value of this capacitance is inversely proportional to the switching frequency and the output voltage as shown below: c out = 100f ? 1v v out ? 1mhz f sw however, applications may still be stable with more or less capacitance, and more capacitance may improve led current waveforms for large pwm dimming ratios. use x7r or x5r ceramic capacitors as they retain their capacitance better than other capacitor types over a wide voltage and temperature range. sources of quality ceramic and electrolytic capacitors are listed in table 3. table 3. capacitor manufacturers manufacturer website murata manufacturing www.murata.com garrett electronics www.garrettelec.com avx www.avx.com nippon chemi-con www.chemi-con.co.jp stabilizing the regulation loop stabilizing the regulation loop typically requires only a capacitor c c connected from the v c pin to gnd. for most designs, values between 1nf and 10nf are suitable. when using an output capacitor c out larger than 10f, as is needed for large pwm dimming ratios , a resistor r c in series with c c may be necessary . larger values of c out require larger values of r c . see typical applications for some examples. selecting and placing the input capacitors although they do not impact stability, several capacitors are necessary between v in and gnd to properly bypass the input supply voltage. at least 10f is required in total, although it does not have to be composed entirely of ceramic capacitors placed very close to the v in pins. however, it figure 5. extended off-time at current limit output shorted da current limit 100s/div inductor current 500ma/div 3932 f05
lt 3932/lt 3932-1 17 3932fa for more information www.linear.com/lt3932 applications information figure 6. placement of input capacitors is important that a ceramic capacitor be placed as close as possible to each of the pairs of v in pins (pins 16 and 17 as well as 20 and 21) and their adjacent gnd pins as shown in figure 6. these two capacitors should be at least 1f if possible. because the sw pins lie between the v in pins, it is convenient to join the v in pins using a trace on the second layer of the circuit board. another 1 f capacitor should be placed very close to the remaining v in pin (pin 26), which supplies the internal control circuitry. low-side nmos driver, this feature eliminates the need for a dedicated return path for the led current in automotive applications or other grounded chassis systems. the gate driver for this pmos draws power through the v out pin, which must be connected even in applications that do not require pwm dimming . when the pwm pin voltage is greater than 1.4v, the driver will pull the gate of the pmos to a maximum of 10v below the v out pin. if v out is below 10v, the gate drive is necessarily reduced. for constant current applications, leave pwmtg open, connect the load directly after the current sense resistor, and connect pwm to intv cc . in these cases, analog dim - ming may be implemented with the ctrl pin. the drain-source voltage rating of the chosen pmos should be greater than the maximum output voltage. typi - cally the output voltage is a little higher than the sum of the forward voltages of the leds in the string . however, when the string is broken , the output voltage will begin to increase due to the imbalance of inductor current and load current. as described in detail later, the lt3932 will not reduce the inductor current nor limit the output volt - age until the fb pin voltage approaches 1v. therefore, the maximum output voltage is ultimately determined by the resistor network between fb and v out . in most applications, the gate-source voltage rating of the pmos should be at least 10v. the only exceptions to this rule are applications for which the output voltage is always less than 10v. the pwmtg driver will try to pull the gate of the pmos down to 10v below v out , but it cannot pull the gate below gnd. therefore, when the maximum output voltage is less than 10v, the pmos gate source voltage rating will be sufficient if it is merely equal to or greater than the output voltage. finally, the drain current rating of the pmos must exceed the programmed led current . assuming this condition and the conditions above are met, the only electrical parameter to be considered is the on-resistance. other parameters such as gate charge are less important because pwm dim - ming frequencies are typically too low for efficiency to be affected noticeably by gate charging loss or transition loss. 15 16 17 18 19 8 7 6 5 4 20 21 22 3 2 1 14 13 12 11 10 9 23 24 25 26 27 28 29 gnd 1f 100nf gnd 3932 f06 sw v in v in v in bst 1f ceramic gnd 1f ceramic gnd top layer bottom layer selecting a mosfet for pwm dimming pulse-width-modulation ( pwm ) dimming of the led cur - rent is an effective way to control the brightness of the light without varying its color . the brightness can also be adjusted more accurately this way than by varying the current level. the lt3932 features a pwmtg driver that is intended for a high-voltage pmos switch in position to effectively pwm dim a string of leds from the output capacitor and current sense resistor. when the switch is open and the string is disconnected, the led current will be zero. in contrast to a
lt 3932/lt 3932-1 18 3932fa for more information www.linear.com/lt3932 applications information table 4 lists recommended manufacturers of pmos devices. table 4. pmos manufacturers manufacturer website infineon www.infineon.com vishay intertechnology www.vishay.com nxp semiconductors www.nxp.com selecting an r p resistor for internal pwm dimming if the rp pin is tied to gnd , an external pulse-width modulated signal at the pwm pin will control pwm dim - ming of the led load. the signal will enable the pwmtg driver and turn on the external pmos device when it is higher than 1.4v. however, the lt3932 is capable of pwm dimming even when an external pwm signal is not available . in this case, an internal pwm signal with frequency set by a resistor at the rp pin and duty ratio set by a dc voltage at the pwm pin will control the pwmtg driver . the r p resistor should be one of the seven values listed in table 5. for each of these values , the pwm frequency is a unique ratio of the switching frequency. table 5. internal pwm dimming frequencies r p switching frequency 2mhz 1mhz 500khz 250khz 28.7k 7.81khz 3.91khz 1.95khz 977hz 47.5k 3.91khz 1.95khz 977hz 488hz 76.8k 1.95khz 977hz 488hz 244hz 118k 977hz 488hz 244hz 122hz 169k 488hz 244hz 122hz 61hz 237k 244hz 122hz 61hz 31hz 332k 122hz 61hz 31hz 15hz when using the internal pwm signal , set the voltage at the pwm pin between 1v and 2v. the pwmtg driver will stay off if pwm is below 1v, and it will stay on if pwm is above 2v. between 1 v and 2 v there are 128 evenly spaced thresholds corresponding to 128 discrete pwm duty ratios from 0% to 100%. this range of 1v to 2v has been chosen so that the pwm voltage may be set using a potentiometer or a resistor network and the 2v refer - ence available at the v ref pin . place a small 1 f ceramic capacitor near pwm pin to ground. figure 7. ismon filter configuration there are a couple of exceptions to the pwm dimming behavior described above. first, once initiated, the pwm on-time will will last at least four switching cycles regard - less of the signal at the pwm pin and the resistor at the rp pin. this ensures that the current regulation loop has enough time to reach equilibrium but still allows for a 5000:1 dimming ratio when the pwm frequency is 100hz and the switching frequency is 2mhz. the lt 3932-1 does not enforce this four-cycle limit so that dimming ratios of 10000:1 or greater are possible in some applications. second, to avoid excessive start-up times, after the first pwm pulse , pwmtg will stay on until the ss pin voltage reaches 1.7 v or the led current has reached 10% of the full-scale current. pwm dimming with very long off times to enhance pwm dimming , the v out and v c pin voltages are driven when the pwm pulse (internal or external) is at a logic low to maintain the charge on the capacitors at those pins. consequently, when pwm returns to a logic high state, the led current can quickly reach the regulated level even if pwm was low for a very long time . this fea - ture facilitates machine vision applications which require a synchronized strobe light or brief illuminating flashes on short delay. monitoring led current the ismon pin provides an amplified and buffered monitor of the voltage between the isp and isn pins. the gain of the internal amplifier is ten, and the speed is fast enough to track the pulse-width modulated led current. however, as shown in figure 7, the ismon voltage can be filtered with a resistor-capacitor network to monitor the average led current instead. lt3932 3932 f07 ismon r mon c mon
lt 3932/lt 3932-1 19 3932fa for more information www.linear.com/lt3932 applications information figure 8. fb resistor configuration figure 9. fault resistor configuration the resistor should be 1m. the capacitance can be as large or small as needed without affecting the stability of the internal amplifier. for example, when the pwm frequency is 200hz, a 100nf capacitor combined with the 1m resistor would limit the ripple on ismon to 1%. selecting the fb resistors two resistors should be selected to form a network between the output voltage and the fb pin as shown in figure 8. lt3932 3932 f08 fb v out r fb2 r fb1 v out(max) = 1v ? 1 + r fb2 r fb1 ? ? ? ? ? ? ? ? ? ? lt3932 3932 f09 faultb intv cc r fault understanding fb overvoltage lockout it is possible that the fb voltage can exceed the 1v limit. if the output voltage is near the maximum when the led string opens, it may take too long for the feedback loop to adjust the inductor current and avoid overcharging the output. however, if the fb voltage exceeds the 1.05v over - voltage lockout threshold, the lt3932 will immediately stop switching and resume only when fb decreases to 1v. this threshold may be routinely exceeded when the lt3932 is being operated as a voltage regulator and the load current decreases rapidly . in this case, the pause in switching limits the output overshoot and ensures that the voltage is back in regulation as quickly as possible. for safe operation, choose r fb2 and r fb1 values to ensure the output voltage is not greater than v in when the fb voltage is 1.05v. open and shorted led fault detection and response the resistor network formed by r fb1 and r fb2 also defines the criteria for two fault conditions with respect to the led string: short and open-circuits. for the lt3932, a short- circuit is when fb is less than 200mv. an open-circuit is when fb is greater than 950mv and simultaneously the difference between isp and isn is less than 10mv (the c/10 threshold). the latter condition ensures that the output current is low ( as it should be in an open-circuit) not just that output voltage is high as it may be when the leds are conducting a large current. in both cases, a fault is indicated by an internal device pulling the voltage at the fault pin low. there is nothing internal that pulls this voltage high, so an external resis - tor between intv cc and fault is necessary as shown in figure 9. this configuration allows multiple fault pins and similar pins on other parts to be connected and share a single resistor. this network forms part of a voltage regulation loop when fb is nearly 1v. in this case, the lt3932 will override the programmed led current to lower the output voltage and limit fb to 1v. this resistor configuration therefore determines the maximum output voltage. note that this voltage limit may be reached inadvertently if it is set too close to the typical output voltage and the output capacitor is too small. to avoid interference with the current regulation, the feedback resistors should be chosen such that fb is about 700mv when the leds are conducting. for a 12v string of leds, design for a maximum output voltage of about 17v. start with a 10k resistor for r fb1 . to calculate the value of r fb2 , add 10 k for every volt of difference between fb (1v) and the maximum output voltage. in this case, the nearest standard 1% value for r fb2 would be 162k. in this way, the lt3932 can also be configured as a volt - age regulator instead of an led driver. it will regulate the output voltage near the programmed maximum as long as the load current is less than the current level programmed by ctrl.
lt 3932/lt 3932-1 20 3932fa for more information www.linear.com/lt3932 applications information soft-start and fault modes the ss pin has two functions . first, it allows the user to program the output voltage startup ramp rate. an internal 20 a current pulls up the ss pin to intv cc . connecting an external capacitor c ss from the ss pin to gnd, as shown in figure 10, will generate a linear ramp voltage. the lt3932 regulates the fb pin voltage to track the ss pin voltage until v out is high enough to drive the led at the commanded current level. part of the cycle before being interrupted. although the lt3932 can safely endure a short-circuit while continuously switching, this hiccup action saves power. the frequency of the hiccups is inversely proportional to c ss and 100nf yields about 8hz. the operating point of a voltage regulator supplying light loads will frequently satisfy the criteria for an open-circuit , and the hiccup behavior would therefore be very disruptive . so when the lt3932 is configured as a voltage regulator, a resistor r ss should be connected between intv cc and ss as shown in figure 10. the current that pulls down the ss pin during a fault is so weak that if r ss is 1m, the voltage at the ss pin will never reach 1.7v. therefore, the lt3932 will not stop switching or start to hiccup. with this resistor, the lt3932 will continue switching and rely on overvoltage and overcurrent protection to guarantee safe operation in the event of open-circuits and short-circuits. if the resistor is changed to 2m, then the ss pin may be discharged to less than 1.7v, but not less than 200mv as shown in figure 12. the lt3932 will consequently cease switching permanently until being reset by the en/uvlo pin or by powering off. some applications may demand this behavior so that short and open-circuits can be in - vestigated manually before resuming normal operation. this latch-off behavior is the third of three ways that the lt3932 can be programmed to respond to faults?the other two being continuous operation and the default hiccup behavior. figure 12. latch-off response to a fault the ss pin is also used as a fault timer. after a fault is detected, an internal 1.25a current sink will begin to discharge the soft-start capacitor and lower the voltage at the ss pin . when the voltage falls from 3.3 v to 1.7v, all switching will cease, but the ss pin will continue to discharge. switching will not resume until ss reaches 200mv. at this point, the 20a current will recharge the soft-start capacitor, and the lt3932 will try to switch again. if the fault persists when ss returns to 1.7v, the process will repeat as shown in figure 11. the charging rate of the soft-start capacitor is much faster than the discharging rate, so while the fault persists, the lt3932 will only attempt switching for a relatively short figure 11. hiccup response to fault figure 10. ss capacitor and resistor configuration lt3932 3932 f10 ss intv cc r ss c ss fault detected fault cleared 10ms/div ss 1v/div 3932 f11 fault detected continuous r ss = 1meg latch?off r ss = 2meg 10ms/div ss 1v/div 3932 f12
lt 3932/lt 3932-1 21 3932fa for more information www.linear.com/lt3932 applications information figure 13. en/uvlo resistor configuration dimming with external drivers continuous operation in response to a fault also enables the lt3932 to operate with external switches that shunt some or all of the leds in the string. the lt3965 8-switch matrix led dimmer, for example, is designed to shunt a changing combination of up to eight leds in a single string with independent pwm dimming signals . see typical applications for more details. programming the en/uvlo threshold an external voltage source can be used to set the voltage at the en / uvlo pin to enable or disable the lt3932. the lt3932 will stop switching, disable the pwmtg driver, and reset the ss pin when the voltage at en/uvlo drops below 1.15v, but internal circuitry will continue drawing current. full shutdown is guaranteed when en/uvlo is below 300mv, and in full shutdown the lt3932 will draw less than 2a. for applications in which the level of the source driving en /uvlo changes slowly , 20mv of hysteresis has been added to the 1.15v enable threshold. alternatively, a resistor network can be placed between v in and en/ uvlo as shown in figure 13. in this case, en/uvlo automatically falls below 1.15v and disables switching when v in falls below a certain level, called the undervoltage lockout (uvlo) threshold, which is defined by resistors r en1 and r en2 . additionally, a 4a current is designed to flow into en/uvlo when the pin voltage is below the threshold. this current provides additional hysteresis. to define the hysteresis (v hyst ) and the uvlo threshold (v uvlo ) select r en1 and r en2 according to the following equations: r en2 = v hyst 4a ? v uvlo 480a r en1 = 1.15 ? r en2 v uvlo ? 1.15 for example, to program a 10v threshold with 1 v of hyster - esis, use 226 k and 29.4 k for r en2 and r en1 , respectively. planning for thermal shutdown the lt3932 automatically stops switching when the internal temperature is too high. the temperature limit is guaranteed to be higher than the operational temperature of the part. during thermal shutdown, all switching is terminated, ss is forced low , and the leds are disconnected using the pwmtg driver. the exposed pad on the bottom of the package must be soldered to a ground plane. vias placed directly under the package are necessary to dissipate heat . following these guidelines, the official four-layer demo board dc2286a reduces thermal resistance ja to 25c/w, but with a compromised board design ja could be 40 c/ w or higher. lt3932 3932 f13 en/uvlo v in r en2 r en1
lt 3932/lt 3932-1 22 3932fa for more information www.linear.com/lt3932 applications information designing the printed circuit board note that large switched currents flow through the local input capacitors and the v in and gnd pins . the loops traveled by these currents should be made as small as possible by keeping the capacitors as close as possible to these pins. these capacitors, as well as the inductor, should be placed on the same side of the board as the lt3932 and connected on the same layer. other large, bulk input capacitors can be safely placed farther from the chip and on the other side of the board. create a kelvin ground network by keeping the ground connection for all of the other components separate. it should only join the ground for the input and output capacitors and the return path for the led current at the exposed pad. there are a few other aspects of the board design that improve performance . an unbroken ground plane on the second layer dissipates heat, but also reduces noise. likewise minimizing the area of the sw and bst nodes reduces noise. the traces for fb and v c should be kept short to lessen the susceptibility to noise of these high impedance nodes. matched kelvin connections from the external current sense resistor r s to the isp and isn pins are essential for current regulation accuracy. the 2.2f in - tv cc and v ref capacitors as well as the 22 nf bst capacitor should be placed as closely as possible to their respective pins. a capacitor for the ctrl pin and, when the internal dimming feature is used, the pwm pin, can compensate for compromised layouts. finally, a diode with anode con - nected to ground and cathode to the drain of the pwmtg mosfet can protect that device from overvoltage caused by excessive inductance in the led string. please refer to the demo board layout of the lt3932 for an example of how to implement these recommendations.
lt 3932/lt 3932-1 23 3932fa for more information www.linear.com/lt3932 typical applications 2a led driver with duty cycle led current r t 523k 287k r fb2 10k r fb1 r s 50m m1 led1 22nf c bst 210f c out c ref 2.2f c vcc 2.2f c ss 100nf c c 10nf c in2 2 1f l1 150h led8 r fault 100k c in1 10f v in en/uvlo v ref ctrl pwm sync/sprd intv c c ss rt rp v c isp gnd isn fb v out sw bst d1 intv cc lt3932 pwmtg v in 36v v out 24v, 2a 200khz l1: wurth 7447709151 d1: nexperia bat46wj m1: vishay si4447ady r s : ohmite lvk12r050d c out 1: murata grm32er71h106k ismon fault fault ismon 3.3v 0v 3.3v 0v enable 3932 ta02 digital ctrl 25% digital ctrl 50% digital pwm 25% digital pwm 50% 500ns/div ctrl 5v/div pwm 2v/div led current 1a/div 3932 ta02a 500ns/div ctrl 5v/div pwm 2v/div led current 1a/div 3932 ta02b 5ms/div ctrl 5v/div pwm 5v/div led current 500ma/div 3932 g33 5ms/div ctrl 5v/div pwm 5v/div led current 500ma/div 3932 ta02d
lt 3932/lt 3932-1 24 3932fa for more information www.linear.com/lt3932 typical applications 24v voltage regulator with spread spectrum v in v in 29v to 36v c in1 10f en/uvlo l1: coilcraft xal5050-153 r s : ohmite lvk12r050d c out : grm32er71h106k d1: nexperia bat46wj intv cc fault bst d1 intv cc sw v out fb rp v c rt isp gnd isn ismon 3932 ta03 lt3932 r fb1 226k r fb2 10k r s 50m r fault 100k r c 20k c in2 2 1f c c 10nf c bst 22nf l1 15h c out 2 10f v out 24v, 2a max r en2 576k r en1 23.7k ss r t 45.3k 2mhz c ss 10nf r ss 1m c vcc 2.2f v ref ctrl pwm sync/sprd c ref 2.2f pwmtg not used efficiency load step response efficiency (29v in ) loss (29v in ) efficiency (36v in ) loss (36v in ) output current (ma) 0 500 1000 1500 2000 92 93 94 95 96 97 0.5 1.0 1.5 2.0 2.5 3.0 efficiency (%) on?chip loss (w) 3932 ta03a 100s/div v out 1v/div i load 500ma/div 3932 ta03b
lt 3932/lt 3932-1 25 3932fa for more information www.linear.com/lt3932 typical applications r en1 c in4 1f r en2 r t 45.3k r c 24.9k r fb2 69.8k r fb1 10k r s 100m m1 led1 led2 c bst 22nf c in2 4.7f c out 4.7f c ref 2.2f c vcc 10f c ss 1nf c c 150pf cb2 100nf c in5 2x470nf l1 2.2h d1 3932 ta07 c in3 33f v in en/uvlo v ref ctrl pwm sync/sprd intv cc ss rt rp v c isp isn fb v out sw bst d1 intv cc lt3932 ismon, fault not used pwmtg v in 8v to 36v v out 6v, 1a 2mhz d1: nxp pmeg4010cej d1: nexperia bat46wj r s : susumu krl1220d-m-r100-f fb1,2: wurth 742792040 l1: wurth 7438323022 m1: vishay si2399ds 50v 1206 50v e ly t. 50v 0603 50v 0402 16v 0805 16v 0402 gnd fb2 fb1 232k 39.2k c in1 2x100nf 50v 0402 dc2286a demo board 14v input to 6v output at 1a class 5 peak limit measured emissions ambient noise frequency (mhz) 0.1 1 10 100 200 ?20 ?10 0 10 20 30 40 50 60 70 80 amplitude (dbv) 3932 ta07a dc2286a demo board 14v input to 6v output at 1a class 5 peak limit measured emissions ambient noise frequency (mhz) 0 100 200 300 400 500 600 700 800 900 1000 ?20 ?10 0 10 20 30 40 50 60 70 80 amplitude (dbv/m) 3932 ta07b dc2286a demo board 14v input to 6v output at 1a class 5 average limit measured emissions ambient noise frequency (mhz) 0.1 1 10 100 200 ?20 ?10 0 10 20 30 40 50 60 70 80 amplitude (dbv) 3932 ta07c dc2286a demo board 14v input to 6v output at 1a class 5 average limit measured emissions ambient noise frequency (mhz) 0 100 200 300 400 500 600 700 800 900 1000 ?20 ?10 0 10 20 30 40 50 60 70 80 amplitude (dbv/m) 3932 ta07d cispr25 peak conducted emissions test cispr25 average conducted emissions test cispr25 peak radiated emissions test cispr25 average radiated emissions test
lt 3932/lt 3932-1 26 3932fa for more information www.linear.com/lt3932 typical applications 2a led driver with internal pwm dimming internal pwm dimming internal pwm dimming r en1 29.4k r en2 274k r t 45.3k 110k r fb2 10k r fb1 r s 50m m1 led1 led2 22nf c bst c ref 2.2f c vcc 2.2f c ss 100nf c c 10nf c in2 2 1f l1 8.2h r p 28.7k r c 162k led3 3932 ta06 r fault 100k r ref2 100k r ref1 100k c in1 10f c out 100f v in en/uvlo v ref ctrl pwm sync/sprd intv cc ss rt rp v c isp isn fb v out sw bst d1 intv cc lt3932 pwmtg v in 12v to 24v v out 12v max, 2a 2mhz l1: wurth 74404064082 m1: infineon irf7204 d1: nexperia bat46wj r s : ohmite lvk12r050d c out : avx tpme107m020r0035 ismon fault fault ismon 7.8khz gnd pwm = 1.078v 2s/div sw 20v/div pwmtg 10v/div i l 1a/div i led 1a/div 3932 ta06a pwm = 1.132v 2s/div sw 20v/div pwmtg 10v/div i l 1a/div i led 1a/div 3932 ta06b
lt 3932/lt 3932-1 27 3932fa for more information www.linear.com/lt3932 typical applications multiple string drivers from single boosted 36v input v in c in1 10f en/uvlo enable1 v ref pwm 3.3v 0v ctrl l1: wurth 74404063082 m1: infineon irf7204 r s1 : ohmite lvk12r050d c out : murata grm32er714475k d1: nexperia bat46wj l0: wrth 7443630420 m0: infineon bsz040n04ls r0: vishay wslp25124l000f d0: onsemi mbr1240mfs intv cc fault bst d1 intv cc sw v out fb rp v c rt isp gnd isn pwmtg ismon lt3932 r fb1 110k r fb2 10k r fault 100k c in2 2 1f c in1 10f c in2 2 1f c c 10nf c ref 2.2f c bst 22nf l1 8.2h c out 4.7f 12v, 1a max m1 r s1 50m ss r t 45.3k 2mhz c ss 100nf c vcc 2.2f sync/sprd 0v 3.3v r ctrl2 49.9k r ctrl1 30.1k v in +2 lt3932 (1a each) en/uvlo enable2 v ref pwm 0v 3.3v ctrl l2: coilcraft lps8045b-153 m2: vishay si2319cds r s2 : ohmite lvk12r100d c out : murata grm32er71h475k d2: nexperia bat46wj intv cc fault bst sw v out fb rp v c rt isp gnd isn pwmtg ismon 3932 ta05 lt3932 r fb1 287k r fb2 10k r fault 100k c c 10nf c ref 2.2f c bst 22nf l2 15h c out 4.7f 30v, 1a max m2 r s2 100m ss r t 45.3k 2mhz c ss 100nf c vcc 2.2f sync/sprd 0v 3.3v gate v in sense gnd ss shdn/uvlo sync v c rt lt3757 r shdn2 48.7k r shdn1 12.1k r c 10k r t 30.9k 400mhz c c 10nf c ss 100nf l0 4.2h d0 c in 10f v in 6v min for operation 10v min for full current v buck 36v, 5a max r0 4m m0 r fb1 348k r fb2 16.2k intv cc c vcc 4.7f c out 5f c out 35f 50v fbx 8 led + d2 intv cc
lt 3932/lt 3932-1 28 3932fa for more information www.linear.com/lt3932 package description please refer to http://www.linear.com/product/lt3932#packaging for the most recent package drawings. ufd package 28-lead plastic qfn (4mm 5mm) (reference ltc dwg # 05-08-1712 rev c) 4.00 0.10 (2 sides) 2.50 ref 5.00 0.10 (2 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wghd-3). 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 27 28 1 2 bottom view?exposed pad 3.50 ref 0.75 0.05 r = 0.115 typ r = 0.05 typ pin 1 notch r = 0.20 or 0.35 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (ufd28) qfn 0816 rev c recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 0.50 bsc 2.50 ref 3.50 ref 4.10 0.05 5.50 0.05 2.65 0.05 3.10 0.05 4.50 0.05 package outline 2.65 0.10 3.65 0.10 3.65 0.05 ufd package 28-lead plastic qfn (4mm 5mm) (reference ltc dwg # 05-08-1712 rev c)
lt 3932/lt 3932-1 29 3932fa for more information www.linear.com/lt3932 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. revision history rev date description page number a 02/18 added LT3932-1 to data sheet. added 10000:1 pwm dimming ratio for LT3932-1 with supporting text in features and description. added machine vision systems to applications. relabeled soft-start pin from s to ss. on figure, added schottky diode from intv cc to bst pin, changed boost capacitor from 100nf to 22nf. changed ja from 43c/w to 25c/w (based on demo board measurement). sense voltage v ctrl changed from 2v to 1.5v. isn pin current v isn value changed from 24v to 23.9v. led current and led voltage limit graphs y-axis corrected to mv units. da limit graph retitled to ?da current limit?, input step changed from 20v upper limit to 25v on input voltage transient response graph. added additional bst pin description text; corrected bst capacitor value from 100nf to 22nf. da current limit added to block diagram. text added to describe da current limit. added LT3932-1 text regarding four-cycle limit and machine vision usage. added text regarding ja equals 25c/w using dc2286 demo board, corrected boost capacitor value. corrected typical application figure, reduced v out from 30v to 24v, changed digital ctrl 50% graph y-axis from 5a/div to 5v/div. add new efficiency graph. added diode d1: nexperia bat46wj. 1 1 1 1, 22, 24, 25, 28 1, 12, 22, 23, 24, 25, 26, 28 2 3 7 9 11 12 15 18 21 22 23 22, 24, 25, 26, 28
lt 3932/lt 3932-1 30 3932fa for more information www.linear.com/lt3932 analog devices, inc. 2018 lt 0218 rev a ? printed in usa www.linear.com/lt3932 related parts typical application part number description comments lt3922 40v, 2a, 2mhz, synchronous boost led driver v in : 2.7v to 40v, v out(max) = 40v, 5000:1 true color pwm? dimming, 5mm 5mm qfn and tssop-28e lt3965 8-switch matrix led dimmer v in : 8v to 60v, digital programmable 256:1 pwm dimming, i 2 c multidrop serial interface tssop-28e package lt3956 80v, 3.3a 1mhz, step-up/down led driver v in : 4.5v to 80v, v out(max) = 80v, 3000:1 true color pwm dimming, 5mm 6mm qfn lt3474 36v, 1a, 2mhz, step-down led driver v in : 4v to 36v, v out(max) = 13.5v, 400:1 true color pwm dimming, tssop-16e lt3475 dual 36v, 1.5a, 2mhz, step-down led driver v in : 4v to 36v, v out(max) = 13.5v, 3000:1 true color pwm dimming, tssop-20e lt3476 quad 36v, 1.5a, 2mhz, step-up/down led driver v in : 2.8v to 16v, v out(max) = 36v, 1000:1 true color pwm dimming, 5mm 7mm qfn lt3477 42v, 3a, 3.5mhz, step-up/down led driver v in : 2.5v to 25v, v out(max) = 40v, 4mm 4mm qfn and tssop-20e lt3478 42v, 4.5a, 2.5mhz, step-up/down led driver v in : 2.5v to 26v, v out(max) = 42v, 3000:1 true color pwm dimming, tssop-16e ltm8040 36v, 1a, module, step-down led driver v in : 4v to 36v, v out(max) = 13v, 250:1 true color pwm dimming, 9mm 15mm 4.32mm lga ltm8042 36v, 1a, module, step-up/down led driver v in : 3v to 30v, v out(max) = 36v, 3000:1 true color pwm dimming, 9mm 15mm 2.82mm lga lt3757 40v, 1mhz, step-up controller v in : 2.9v to 40v, positive and negative output voltages, 3mm 3mm dfn and msop-10e 700ma matrix led driver with individual dimming for 6 leds r en1 10.2k r en2 249k r t 287k 267k r fb2 10k r fb1 r s 100m led6 led2 22nf c bst c ref 2.2f c vcc 2.2f c ss 10nf c c 330pf c in2 2x1f l1 33h led1 r ss 1m r ref2 110k c in1 10f c out 22nf r en4 249k r en3 10.7k c vdd 2.2f r sda 10k r scl 10k r alert 10k r dd 100k r ref1 105k r pwm 10k d7 d1 d2 d6 v in en/uvlo v ref ctrl pwm sync/sprd intv cc ss rt rp v c isp isn fb v out sw bst d1 intv cc lt3932 v in 32v v out 28v max 700ma 350khz l1: wurth 74437349330 d1: nexperia bat46wj d1-7: nxp pmeg4010cej r s : ohmite lvk12r100der gnd d6 d2 d1 s6 s2 s1 v in gnd en/uvlo sda scl alert addr1-4 ledref pwmclk v dd lt3965 d7 d8 v dd 3.3v 0v 350khz 3932 ta04 s8 s7 50v 50v 0402 start pwmtg, fault, and ismon not used

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